The UnifiedBus technology addresses the communication lag between components by consolidating over ten interconnect protocols into a single framework. This shift increases bandwidth to the terabit-per-second level while cutting round-trip latency from 7 microseconds to just 2 microseconds. By enabling direct, peer-to-peer access between CPUs, NPUs, and storage, the architecture allows for more flexible resource pooling and global memory addressing.
Huawei Debuts UnifiedBus Architecture to Scale Million-NPU Clusters
At HUAWEI CONNECT 2026, Yang Chaobin unveiled a computing architecture designed to eliminate the bottlenecks that plague large-scale AI training. By introducing UnifiedBus, Huawei aims to push beyond the limitations of traditional systems, where massive clusters often see less than 20 percent of their computing capacity realized during model training.
Hardware innovations accompanying this launch include the LinkBlade for cable-free cabinet connectivity, which eliminates nearly 200 kilometers of copper cabling in large SuperPoDs, and the UBG switch, capable of supporting a million-NPU SuperCluster. These components facilitate the training of models with tens of trillions of parameters. Beyond massive infrastructure, Huawei is scaling this technology down into compact compute appliances, allowing small and medium-sized enterprises to host trillion-parameter models locally. The company is simultaneously integrating these systems with open-source frameworks to foster a broader ecosystem for agentic AI development.
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